翟建旺，北京邮电大学特聘副研究员，硕士生导师。2018年于北京交通大学通信工程（试点班）专业获学士学位，2023年于清华大学计算机科学与技术专业获博士学位，同年经人才引进至北京邮电大学集成电路学院。

主要研究方向为机器学习赋能电子设计自动化（EDA），聚焦于前端微架构功耗建模、设计空间探索、以及后端物理设计验证等方向的研究。近年来，在TCAD、TVLSI、TCAS-II、ICCAD、DATE、ASP-DAC、AAAI等高水平国际期刊会议上发表多篇论文，曾荣获ICCAD 2021最佳论文奖，以及ASP-DAC 2023最佳论文奖提名。主持GF科技国家级项目、北京市自然科学基金等项目，并作为骨干参与国家重点研发计划、国家自然科学基金重点等项目。

个人主页：https://zhaijw18.github.io/

欢迎计算机、集成电路、电子信息、数学等相关背景的同学联系。

主要研究方向

机器学习辅助EDA：芯片设计空间探索、功耗建模、物理设计及验证等。

代表性成果

[1] Jianwang Zhai, Chen Bai, Binwu Zhu, Yici Cai, Qiang Zhou, and Bei Yu, McPAT-Calib: A RISC-V BOOM Microarchitecture Power Modeling Framework, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 01, pp. 243–256, 2023.

[2] Jianwang Zhai, Yici Cai, Microarchitecture Design Space Exploration via Pareto-driven Active Learning, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 31, no. 11, pp. 1727-1739, 2023.

[3] Jianwang Zhai, Yici Cai, and Qiang Zhou, Placement and Routing Methods Considering Shape Constraints of JTL for RSFQ Circuits, IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), vol. 68, no. 5, pp. 1571-1575, 2021.

[4] Jianwang Zhai, Chen Bai, Binwu Zhu, Yici Cai, Qiang Zhou, and Bei Yu, McPAT-Calib: A Microarchitecture Power Modeling Framework for Modern CPUs, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov, 1-4, 2021, pp.1-9.

[5] Jianwang Zhai, Yici Cai, and Bei Yu, Microarchitecture Power Modeling via Artificial Neural Network and Transfer Learning, IEEE/ACM Asian and South Pacific Design Automation Conference (ASP-DAC), Jan. 16-19, 2023, pp. 1-6. (Best Paper Award Nomination)

[6] Chen Bai, Jianwang Zhai#, Yuzhe Ma, Bei Yu#, Martin D.F. Wong, Towards Automated RISC-V Microarchitecture Design with Reinforcement Learning, AAAI Conference on Artificial Intelligence (AAAI), Vancouver, Feb. 20-27, 2024.

[7] Jingyu Jia, Jianwang Zhai#, Kang Zhao, Fast Estimation for Electromigration Nucleation Time Based on Random Activation Energy Model, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Valencia, Spain, Mar. 25-27, 2024.

[8] Zirui Li, Jianwang Zhai#, Zixuan Li, Zhongdong Qi, Kang Zhao, Effective Resource Model and Cost Scheme for Maze Routing in 3D Global Routing, IEEE International Symposium on Circuits and Systems (ISCAS), Singapore, May. 19-22, 2024.

[9] Feng Guo*, Jiawei Liu*, Jianwang Zhai#, Jingyu Jia, Kang Zhao, Chuan Shi#, PGAU: Static IR Drop Analysis for Power Grid using Attention U-Net Architecture and Label Distribution Smoothing, ACM Great Lakes Symposium on VLSI (GLSVLSI), FL, USA, Jun. 12-14, 2024.

[10] Chen Bai, Qi Sun, Jianwang Zhai, Yuzhe Ma, Bei Yu, MD Wong, BOOM-Explorer: RISC-V BOOM Microarchitecture Design Space Exploration Framework, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 01–04, 2021. (William J. McCalla Best Paper Award)