赵康，教授，博士生导师。深耕集成电路EDA领域(Synthesis)近20年，既有高校工作经历，又有丰富的国际领军企业高端产品设计经验。2009年博士毕业于清华大学计算机系EDA实验室，之后留校工作两年，曾主持参与国家自然科学基金、国家博士后基金、十一五核高基重大专项。2011年加盟英特尔研究院，期间参与Intel Clanton处理器、软硬协同验证、人工智能机器人等项目。2016年加盟Xilinx(AMD)北京研发中心，领导Xilinx(AMD)的EDA高层次综合产品团队，对接全球FPGA领域最先进的HLS产品。2022年加盟北京邮电大学集成电路学院，专注于集成电路学科的EDA方向，尤其侧重数字前端的高层次综合与逻辑综合。目前以项目负责人身份牵头十四五科技部重点研发项目1项，若干企业合作项目。

详见个人英文主页  https://zhaokang-lab.github.io/

主要研究方向

EDA电子设计自动化；FPGA工具；编译优化；体系结构

代表性成果

· Kang Zhao, Yuchun Ma, et al. Adaptive Selection and Clustering of Partial Reconfiguration Modules for Modern FPGA Design Flow. ACM Transactions on Reconfigurable Technology and Systems. Oct 2022.

· Kang Zhao, Wenbo Shen. Parallel Stimulus Generation Based on Model Checking for Coherence Protocol Verification. IEEE Trans VLSI Systems, Volume: 23, Issue: 99, ISSN: 1063-8210, Dec 2015, pp 1063-8210.

· Jianlei Yang, Liwei Ma, Kang Zhao, Yici Cai, Tin-fook Ngai. Early Stage Real-Time SoC Power Estimation Using RTL Instrumentation. Asia and South Pacific Design Automation Conference (ASP-DAC), 2015.

· Ruining He, Yuchun Ma, Kang Zhao, Jinian Bian, “ISBA: An Independent Set-Based Algorithm for Automated Partial Reconfiguration Module Generation”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2012, pp.500-507.

· Kang Zhao, Jinian Bian. Pruning-Based Trace Signal Selection Algorithm for Data Acquisition in Post-Silicon Validation. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. Vol.E95-A (No.6), 2012: 1030-1040.

· Jiliang Zhang, Yongqiang Lu, Qiang Zhou, Qiang Wu, Yaping Lin, and Kang Zhao. TimeFastPlace: Critical path Based timing driven FastPlace. IEICE Electronics Express, Vol.9, No.16, 2012.

· Kang Zhao, Jinian Bian. Pruning-based Trace Signal Selection Algorithm. Asia and South Pacific Design Automation Conference (ASP-DAC). Yokohama, 2011.

· Kang Zhao, Jinian Bian. Processor Accelerator Customization through DFG Exploration. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences, Vol.E94-A (No.7), 2011: 1540-1552.

· Kang Zhao, Jinian Bian. Peeling Algorithm for Custom Instruction Identification. IEEE Asia Pacific Conference on Circuits and Systems. Kuala Lumpur, Malaysia, Dec 2010.

· Kang Zhao, Jinian Bian, and et al. Pipeline-based Partition Exploration for Heterogeneous Multiprocessor Synthesis. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences, Vol.E92-A (No.9), 2009: 2283-2294.

· Kang Zhao, Jinian Bian, Sheqin Dong, Yang Song, Satoshi Goto. Exploring Partitions based on Search Space Smoothing for Heterogeneous Multiprocessor System. IEICE Trans. Fundamentals of Electronics Communications and Computer Sciences, Vol.E91-A (No.9), 2008: 2456-2464.

· Kang Zhao, Jinian Bian, et al. Fast Custom Instruction Identification Algorithm based on Basic Convex Pattern Model for Supporting ASIP Automated Design. IEICE Trans. on Fundamentals of Electronics Communications and Computer Sciences, Vol.E91-A (No.6), June 2008: 1478-1487.

· Kang Zhao, Jinian Bian, Sheqin Dong, Yang Song, Satoshi Goto. HyMacs: Hybrid Memory Access Optimization based on Custom-instruction Scheduling. Proceedings of ACM Great Lakes Symposium on VLSI, Orlando, USA, May 2008: 89-94.

· Kang Zhao, Jinian Bian, Sheqin Dong, Yang Song, Satoshi Goto. Automated Specific Instruction Customization Methodology for Multimedia Processor Acceleration. Proceedings of International Symposium on Quality Electronic Design, San Jose, CA, March 2008: 321-324.

· 赵康, 边计年, 董社勤. 基于集束式整数线性规划模型的专用指令集自动定制. 计算机辅助设计与图形学学报(JCAD), 19(10), 2007.10: 1229-1234. (EI)